K1921VG1T
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K1921VG1T is a 32-bit microcontroller based on RISC-V dual-core architecture.
It has 4096 Kbyte of embedded non-volatile memory, a wide range of general-purpose and specialized devices and peripheral interfaces.
The product will be available for purchase in the first quarter of 2026.
Application area: The MCU can be applied in measuring, communication, surveillance, security systems, in industrial automation, medicine, energy and industry devices including electric drives, as well as in various control systems.
Configuration and features:
– two RISC-V cores of Russian design (32-bit, 32 registers, built-in multiplication unit, Floating Point Unit, DSP instructions support and debugging unit) with up to 204MHz frequency;
– 32-channel general purpose DMA controller that facilitates data transfer between peripherals and SRAM;
– External Memory controller (EMC) supporting SRAM, ROM, NOR Flash и SDRAM;
– 1MB SRAM with ECC support;
– Program Flash memory:
- 4096 КB with ECC support and ISR (Interrupt Service Routine) to handle the completion of the write or erase operation (if the target price for the microcontroller is not reached, this parameter may be renegotiated using a separate protocol);
- minimum erase segment is 2Кbyte max.;
- RWW support (4х1 Мbyte memory with independent read and write data lines from different blocks);
– Flash data memory that can store code and includes a bootloader:
- 512 Kbyte with ECC support;
- minimum erase segment is 2 Kbyte max.;
– a 16 Kbyte OTP data memory;
– sixteen 32-bit multifunctional timers with PWM support and capture mode with the following features:
- individual period registers;
- a timer can be started via controller pin;
- separate 16-bit prescaler (divider) for each timer (as a counter);
- a timer can be started based on the overflow of another timer;
- each timer can be configured to count up or down;
- 4 external pins can be used for clocking a timer/ capture event/ PWM output (depending on the mode – TMR/CAP/PWM);
- up to 8 configurable interrupt vectors (timer overflow, Capture Mode (CAP);
- 8 comparators for each timer with capture/compare functions;
- unable to delay the output signal generation by a configurable number of clock cycles,
- signals from peripheral blocks (GPIO, ACMP, ADC, PWM) can be used as sources of capture events;
- simultaneous start/stop of all timers can be performed
– sixteen 2-channel PWM blocks similar to 1921VK028;
– battery-powered RTC with clocking from an external 32,768 kHz oscillator, generation control and automatic transition to the internal generator in case of failures with support for the following modes:
- connecting an external 32,768 kHz oscillator,
- operation in SLEEP mode;
– a cryptography acceleration unit, including a true random number generator (TRNG), CRC32 checksum calculation modules and encryption modules using AES 128/256 and HASH algorithms;
– two Quad SPI serial interface ports;
– eight UART ports;
– eight LIN ports;
– one Micro-second-channel (MSC) interface port;
– eight SPI ports with the following features:
- SSI, Motorola, Microwire protocols,
- polarity and phase adjustment,
- at least 2 alternative pinouts for each block,
- program control of the data rate;
- programmable data frame duration from 4 to 32 bits;
- up to 50 MHz frequency in master mode and up to 8 MHz in slave mode
– two I2C interface controllers;
– four twelve-channel 12-bit ADCs with the following features:
- maximum ADC speed – 1 MSPS,
- operation under control of eight sequencers, each of which allows to independently start measurements on the required ADC channels and generate an interrupt,
- conversion start from an external clock signal (timer, port, PWM),
- single, cyclic operating modes with restart, with the ability to average the results,
- 24 independent digital comparators that track and compare measurements with threshold values to generate interrupts and control signals for other microcontroller units;
- Eight measurement result buffers (each organized as FIFO),
- 2 channel priority levels;
– two 12-bit DACs;
– four analog comparators;
– two USB 2.0 Full speed ports, Host/Device with an integrated PHY module;
– one 10/100/1000 Ethernet interface port with integrated PHY module with the following features:
- FullDuplex,
- using DMA for data receiving/transmitting process;
– eight CAN interface ports;
– four I2S interface ports;
– temperature sensor;
– GPIO input/output ports with the following features:
- 16-bit capacity;
- number of GPIOs should be as high as possible;
- the ability to read the pin state regardless of the choice of alternative functions;
- individual configuration of functions for each pin,
- the ability to change the state of the output pin via an additional register (SET, CLEAR, TOGGLE, masked output),
- Configurable edges of the input signal.
– QFP-208 package.