K1921VG3T

K1921VG3T is a low-power 32-bit microcontroller based on RISC-V core architecture with motor control functions.

It has 1 Mbyte of non-volatile memory, a wide range of general-purpose and specialized units and interfaces.

The product will be available for purchase in the first quarter of 2026.

Description

Application area: The MCU can be applied in measuring, communication, surveillance, security systems, in industrial automation, medicine, energy and industry devices including electric drives, as well as in various control systems.

Configuration and features:
 
– a general purpose 32-bit processor core based on RISC-V architecture of Russian design (32-bit, 32 registers, built-in multiplication unit, Floating Point Unit, debugging unit) with up to 120 MHz frequency;
– the microcontroller can be clocked by an oscillator with a frequency between 32 and 160 kHz;
– a low-power mode for the entire microcontroller with max. 100 µA current consumption in operating temperature and voltage, the clock frequency range is 32 to 160 kHz;
–  a general-purpose 24-channel DMA controller that supports peripheral-to-SRAM transfer operations;
– an external memory controller (EMC) that supports SRAM, ROM, NOR Flash and SDRAM;
– 256 KByte SRAM with ECC support;
– program Flash memory:

  • 1 Mbyte capacity with ECC support and ISR (Interrupt Service Routine) to handle the completion of the write or erase operation;
  • the minimum erase segment is 2Kbyte max.;

– 32 Kbyte data Flash-memory with ECC support;
– sixteen 32-bit multifunctional timers with PWM and capture mode (CAP) support with the following features:

  • individual period registers;
  • a timer can be clocked via controller pin;
  • separate divider for each timer (as a counter);
  • a timer can be started on overflow event of another timer;
  • each timer can be configured to count up or down;
  • an external pin can be used for clocking the timer/capture event/PWM output (depending on the mode – TMR/CAP/PWM);
  • 2 configurable interrupt vectors (operation thresholds in TMR mode, capture events in CAP mode);
  • 2 capture registers in CAP mode;
  • signals from peripheral blocks (GPIO, ACMP, ADC, PWM) can be used as sources of capture events;
  • simultaneous start/stop of all timers can be performed;

– battery-powered RTC with clocking from an external 32,768 kHz oscillator, generation control and automatic transition to the internal generator in case of failures with support for the following modes:

  • connecting an external 32,768 kHz oscillator (or generator),
  • operation in SLEEP mode;

– nine 2-channel PWM blocks, similar to PWM from 1921VK028 with the following features:

  • independent registers for signal period and comparison thresholds;
  • a configurable delay to a generated output signal, measured in clock cycles can be introduced;
  • channel inversion;
  • input clock frequency dividing;
  • timer synchronization by events and between each other;
  • software channel control;
  • alarm signal inputs with configurable response;
  • interrupts on period, zero and comparison threshold events

 – six capture/comparison modules similar to ECAP from 1921VK028;

  • four 32-bit time capture registers;
  • selectable front polarity for processing each of four consecutive events;
  • interruption sources for each of four events;
  • one-time capture of time values for up to four events;
  • event-based cyclic operation mode with value rewriting (ring buffer);
  • capture mode for absolute and relative time values;
  • alternative operating mode as single-channel PWM output if time capture function is not enabled –.

–two pulse quadrature decoders used to process rotor position sensor signals in high-performance systems to determine position, direction and speed of rotation;
–cryptography acceleration unit, including a true random number generator (TRNG), CRC32 checksum calculation modules and encryption using AES 128/256 and HASH algorithms;
– Quad SPI serial interface port;
– six UART ports;
– four LIN ports;
– Four SPI ports with the following features:

  • SSI, Motorola, Microwire protocols;
  • polarity and phase setting;
  • minimum 2 alternative output options for each block;
  • software control of the exchange rate;
  • programmable information frame length from 4 to 32 bits;
  • 16 -words data buffer;
  • frequency up to 60 MHz in master mode and up to 10 MHz in slave mode

– two I2C interface controllers;
– three 11-channel 12-bit ADCs with the following features:

  • 32 external channels + internal temperature sensor on the 33rd channel;
  • 1 MSPS maximum conversion speed ;
  • operation control by eight sequencers, each of which allows to independently perform measurements on the required ADC channels and generate an interrupt;
  • eight buffers for measurement results (each organized as a FIFO);
  • conversion start from an external clock signal (timer, port, PWM);
  • single and cyclic restart operating modes, with the possibility to average results,
  • 24 independent digital comparators that track and compare measurement results with threshold values to generate interrupts and control signals for other microcontroller blocks;
  • 2 levels of channel priority;

 

– three analog comparators;
– two 12-bit DACs;
– USB 2.0 Full speed, Host/Device port with integrated PHY module
– 10/100/1000 Ethernet interface port with integrated PHY module with the following features:

  • FullDuplex,
  • using DMA to receive/transmit data;

– six CAN interface ports;
– temperature sensor;
–General Purpose Input/Output (GPIO) interface with the following features:

  • 16-bit depth,
  • individual settings for each pin,
  • possibility to change the state of the output pin via additional register (SET, CLEAR, TOGGLE, masked output)
  • possibility to set interrupts on configurable edges of the input signal.

 - QFP-208 package.